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| AC23V8000 Description 1MX8 BIT CMOS MASK ROM The AC23V8000 high performance read only memory is organized 1,048,576 x 8 bit (byte mode) and has an access time of 70/100/120ns. The low power feature allows the battery operation. The large size of 8M bit memory density is ideal for charactergenerator, data or program memory in micro-processor application. The AC23V8000 is provided as die form in waffle pack tray. Key features * 1,048,576 X 8bit organiszation * Single 3.3V power supply operation * Access Time : 70/100/120ns (Max) * Standby Current : 50 (Max) * Operating Current : 35 (Max) * TTL compatible inputs and outputs * 3-State outputs for wired-OR expansion * Programmable CE or OE pin * Fully static operation * Package AC23V8000 : Die in waffle pack tray Pin Description Pin A0~A19 Q0~Q7 CEB* OEB* VCC VSS Function Address inputs Data Outputs Chip Enable input Output Enable input Power supply Ground * User selectable polarity * CEB : CE/CEB * OEB : OE/OEB Pin Configuration A19 VCC VCC A15 A16 A14 A13 42 41 40 39 38 37 36 35 34 33 32 31 30 29 21 22 NC 23 24 25 VSS VSS Q3 26 28 27 A7 A12 A18 A17 NC A6 NC A5 A4 NC NC NC A3 A2 A1 A0 NC 54 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Q1 Q0 32 1 46 45 44 43 47 NC A8 NC A9 A11 NC NC NC OEB A10 CEB Q7 Q6 Bonding Pad No Bonding Pad Q2 Q4 Q5 Page 1 of 6 ARTCHIPs AC23V8000 Block Diagram A0~A19 ADDRESS BUFFER 1MX8 BIT CMOS MASK ROM X-DECODER MEMORY ARRAY 8MBIT ROM CELL X-PREDEC Y-PREDEC Y-DECODER SENSE AMP CEB OEB CONTROL CIRCUIT OUTPUT CIRCUIT Q0~Q7 Page 2 of 6 ARTCHIPs AC23V8000 Absolute Maximum Ratings Symbol TA TSTG VCC VOUT VIN Parameter Ambient Operating Temperature Storage Temperature Supply Voltage to Ground Potential Output Voltage Input Voltage Rating -10 ~ 80 -55 ~ 150 -0.3 ~ 4.5 -0.3~Vcc+0.3 -0.3~Vcc+0.3 1MX8 BIT CMOS MASK ROM Unit O C C O V V V Stress above those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only. Functional operation of this device at these or any other conditions above those indicated in the operational sections of this specification is not implied and exposure to absolute maximum rating conditions for extended periods may affect device reliability. Recommended DC Operating Conditions(VCC=3.3*0.3V, TA=0~70O C ) Symbol Vcc Vss VIH VIL Parameter Supply Voltage Supply Voltage Input High Voltage Input Low Voltage Min 3.0 0 2.2 -0.3 Typ 3.3 0 Max 3.6 0 Vcc+0.3 0.8 Unit V V V V DC Electrical Characteristics(VCC=3.3*0.3V, TA=0~70 O C ) Symbol VOH VOL IIL IOL ICC Parameter Output High Voltage Output Low Voltage Input Leakage Current Output Leakage Current Operating Supply Current (tRC=100ns) ISB1 ISB2 Standby Current(TTL) Standby Current(CMOS) Condition IOH=-0.4mA IOL=2.1mA Min 2.4 Typ Max Unit V 0.4 10 V uA uA mA uA uA VIN=0V to VCC VOUT=0V to VCC CEB=OEB=VIL All Output Open CEB=VIH, all Output Open CEB=VCC, all Output Open 10 35 500 50 Page 3 of 6 ARTCHIPs AC23V8000 Capacitance(TA=25O C , f=1.0MHz) Symbol CI CO Parameter Input Capacitance Output Capacitance Condition VIN = 0V VOUT = 0V Min 1MX8 BIT CMOS MASK ROM Max 10 10 Unit pF pF Capacitance is periodically sampled and not 100% tested Function Table CE/CE L/H OE/OE X H/L H/L L/H Output Disable High Z Mode Standby Operating Data High Z DOUT Active Power Standby AC Characteristics(VCC=3.3*0.3V, TA=0~70 O C ) Symbol tRC tACE tAA tAOE tOH tHZ tLZ Parameter Min Read cycle time Chip enable access time Address access time Output enable access time Output hold time from address change Output or chip disable to output High-Z Output or chip Enable to output Low-Z 10 0 20 10 70 70 70 35 0 20 10 Max Min 100 100 100 50 0 20 Max Min 120 120 120 60 Max ns ns ns ns ns ns ns 70ns 100ns 120ns Unit AC Test Condition * Input pulse level * Input rise and fall time * Input and output timing level * Output load 0.4V to 2.4V 10ns 1.5V 1 TTL gate and CL=100pF(70ns product CL=30pF) Page 4 of 6 ARTCHIPs AC23V8000 Timing Waveforms READ MODE 1MX8 BIT CMOS MASK ROM tRC ADD A0~A19 CEB:ACTIVE LOW CE/CEB CE:ACTIVE HIGH ADD1 ADD2 tACE tHZ tAOE OEB:ACTIVE LOW OE/OEB OE:ACTIVE HIGH tAA tLZ Q0~Q7 tLZ tOH VALID VALID Page 5 of 6 ARTCHIPs AC23V8000 Revision History Rev No. rev0 rev1 rev2 Date 10-Mar-2001 09-Jan-2002 16-June-2003 Package dimension modified Package exempted and pad diagram added Contents 1MX8 BIT CMOS MASK ROM Page 6 of 6 ARTCHIPs |
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